Curriculum
Vitae
Rami Abielmona
SITE/University of
a) PERSONAL
INFORMATION:
Abielmona, Rami,
Doctorate Candidate
Citizenship: Canadian
Present
employer:
800 King Edward
Contact: rabielmo@site.uottawa.ca, Tel: (613) 562-5800 x 2197
Web
page: http://www.site.uottawa.ca/~rabielmo/
Hobbies: Active skier, as well as an avid
soccer and basketball player
Languages: Speak and write fluently in English
and French
b) DEGREES:
Ph.D. Electrical Engineering, University of Ottawa,
Canada, 2002-
M.A.Sc. Electrical Engineering, University of Ottawa,
Canada, 2002
B.A.Sc. Electrical Engineering, University of
Ottawa, Canada, 1999
c) EMPLOYMENT HISTORY:
Winter ‘00- Research Assistant,
SITE,
Winter ’00-’01- Principles of VLSI Design (ELG 4132)
Teaching Assistant, SITE, University
-’02 of
Fall
‘01 Computer Architectures
(CEG 2131) Teaching Assistant, SITE,
Fall ’00-’01 Computer Design Project (CEG 4392)
Teaching Assistant, SITE,
Summer ‘00 Hardware Designer,
RRSP, Alcatel Networks,
Winter ’99 Hardware Designer
(co-op), IP over ATM, Newbridge Networks,
Fall
’98 Firmware Designer
(co-op), Wireless, Newbridge Networks,
Winter ’97 Software Designer
(co-op), ATMnet
Cell Relay, Newbridge Networks,
Summer ’96 Programmer and Database Administrator
(co-op), Engineering Management Subsection, Department of National Defence,
d) HONOURS:
University of Ottawa Excellence Scholarship,
University of Ottawa, 1995-
NSERC Post-Graduate Scholarship (PGS-B), NSERC,
2002-2003
Tomorrow's
Technology Leadership Award,
CITO Knowledge Network Conference, 2002
Ontario Graduate Scholarship (OGS), OSAP, 2000-2001
e) PUBLICATIONS:
1) Life-time summary (count) according to the
following categories:
-
Papers in refereed conference proceedings..................................................................................... 8
-
Papers in refereed conference proceedings (submitted)............................................................... 1
2) Details
for previous categories:
Papers
in Refereed Conference Proceedings
- Assaf M., Abielmona
R., Abolghasem P., Das
S., Petriu E., Groza
V. “JBits Implementation and Design Verification
in Space Compressor Design of Digital Circuits,” IASTED International
Conference on Modelling, Identification and Control 2003, Innsbruck,
Austria, 10-13 February 2003
- Groza V., Abielmona
R., Petriu E. “ADPCM environment with a
neural network predictor engine,” IEEE Instrumentation and Measurement
Technology Conference IMTC 2002, ISBN 0-7803-7218-2, pp. 541 – 546,
Alaska, USA, 21-23 May, 2002
- Cretu A.M., Groza
V., Al-Dhaher A., Abielmona
R., “Performance Evaluation of a Software Cluster,” IEEE
Instrumentation and Measurement Technology Conference IMTC 2002,
Anchorage, ISBN 0-7803-7218-2, pp. 1543 – 1548, Alaska, USA, 21-23 May,
2002
- Cretu A.M., Groza
V., Al-Dhaher A., Abielmona
R., “Performance Evaluation of a Software Cluster,” IEEE
Instrumentation and Measurement Technology Conference IMTC 2002,
Anchorage, ISBN 0-7803-7218-2, pp. 1543 – 1548, Alaska, USA, 21-23 May,
2002
- Abielmona R., Groza V.
“Intelligence in Architectures: Reconfigurable Learning Techniques in
Autonomous Agents,” Canadian Conference of Electrical & Computer
Engineering, CCECE'02, ISBN 0-7803-7514-9,
pp. 786 – 791, Winnipeg,
Canada,
- Abielmona R., Groza V. “Circuit
synthesis evolution using a hardware-based genetic algorithm.” CCECE
2001 - Canadian Conference on Electrical and Computer Engineering, pp
963-967, Toronto, Canada, June 2001
- Abielmona R., Groza V. “The design
of an evolvable coprocessor.” IMTC’2001, IEEE Instrumentation and
Measurement Technical Conference,
ISBN: 0-7803-6648-8, pp. 844-847,
Budapest, Hungary, May 2001
- Abielmona R., Abielmona S., Abougabal M., Wael H., Groza V., Petriu E. “The
Architecture of an IP over ATM Processor.” ICT 2001 – IEEE
International Conference on Telecommunications, ISBN 973 – 99995 – 3 – 0, pp. 321-326, Bucharest,
Romania,
Papers
in Refereed Conference Proceedings (submitted)
1. Abielmona R.
“Can an Intelligent Society of Robots Survive in a Hostile Environment?,” Canadian
Conference of Electrical & Computer Engineering, CCECE'03, Montreal,
Canada,
f) EMBEDDED DESIGN TOOL KNOWLEDGE:
Excellent knowledge of the following
embedded design tools and environments:
Altera
MAX+PLUS II (v10.1) and Quartus II (v2.0)
Borland C++ Builder
(v5) and JBuilder (v5)
Cadence NC-VHDL and
NC-Verilog compilers and NC-Sim
simulator (v2001a)
Cadence OrCAD Suite (v9.2)
Cadence SignalScan Waveform Analyzer (v2001a)
Cadence Virtuoso-XL Layout Editor (v2001a)
Iona Orbix (v3.0)
Mentor Graphics LeonardoSpectrum (v2000)
Metrowerks CodeWarrior C for HC12 and PalmOS
(v8.0)
Microsoft Visual C++
(v6.0)
Model Technology Modelsim (v5.1)
Star HSPICE (v 2002.2.1)
Synopsys VHDL Analyzer, Simulator and Debugger (v2000.06)
Synopsys Design Analyzer and Checker (v2000.05)
Xilinx
Alliance (v3.1), Foundation (v2.5) and ISE (v5.1i)
Xilinx
JBits API (v2.7)
g) GENERAL COMPUTER KNOWLEDGE:
Knowledge of the following languages
and environments (and expertise level):
Utilization, operation
and administration of Windows/UNIX/Linux workstations (Excellent)
Design, development
and verification of digital blocks using VHDL/Verilog/ABEL
(Excellent)
Design, implementation and testing of embedded software using C/68k
assembly (Excellent)
Design, realization and checking of object-oriented models using C++/SmallTalk/Java (Very good)
Documentation preparation and organization using Microsoft Office/LaTeX (Excellent)
Internet-based tool realization such as dynamic web sites, applets and
web applications using HTML/ASP/VBScript/Dreamweaver
(Excellent)
Database tool design and implementation using Microsoft SQL Server and
Access (Very good)
Script development and realization using Tcl/Tk/C/Shell/Perl
(Excellent)
Simulation of targeted functionality using Matlab/HSPICE
(Excellent)
Graphics-based development such as banners and web sites using Adobe
Photoshop (Excellent)
Implementation of GUI functionality and connectivity using Microsoft
Visual Basic/Borland C++ Builder (Very good)
h) DEVELOPMENT OF TEACHING MATERIALS:
Work was initiated and completed on the
following teaching materials:
Designed and developed
an automated web-based student registration tool (CEG 3131)
Designed and realized course web page templates currently being utilized
by other colleagues (CEG 2131, ELG 4132 and CEG 4392)
Prepared and aided in the design and construction of the robotic
platforms utilized in the 4th year capstone computer engineering
design project (CEG 4392)
Designed and realized the project specifications for the 4th
year VLSI design course during the winter of 2002 (ELG 4132)
Co-developed and co-supervised senior undergraduate projects involving
reconfigurable run-time environments, intelligent sensor agent coupling and
digital design verification (CEG/ELG 4905)
i) RESEARCH INTEREST AND TEACHING
MOTIVATION:
The general research
interest is embedded artificial intelligence, but more specifically including genetic
algorithms, neural networks, evolvable hardware, reconfigurable computing and
architectures, VLSI design and distributed intelligent sensor systems.
The main teaching
motivation is to empower students with the knowledge, expertise and confidence
required to systematically attack and successfully resolve any real-world (or
even virtualized) engineering problem.
Secondary motivations include the vital duties of any instructor
concerning his/her students, and those include their introduction to the benefits
of a graduate degree, their preparation for the industry, their deep
understanding of the course curriculum, their development of a sound
theoretical base, complemented with a challenging, yet enjoyable, practical
component, and finally their overall training into becoming professional
engineers.
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